Ferroelectric memory device with capacitor electrode in direct contact with source region
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Feb 2, 1999
Issued Date -
N/A
app pub date -
Jul 19, 1993
filing date -
Sep 28, 1990
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A memory suitable for integration having a memory structure where at least one capacitor formed by using a ferroelectric is integrated on a semiconductor device substrate. In a unit cell structure forming the memory, an upper electrode, located at an upper position among electrodes constituting the capacitor, is directly connected to a high density diffusion layer constituting a MOS transistor.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully