Chip scale ball grid array for integrated circuit packaging
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United States of America Patent
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Feb 2, 1999
Issued Date -
N/A
app pub date -
Oct 8, 1997
filing date -
Dec 2, 1996
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A chip scale ball grid array for integrated circuit packaging having a nonpolymer layer or support structure positioned between a semiconductor die and a substrate. The nonpolymer support structure acts to increase circuit reliability by reducing thermal stress effects and/or by reducing or eliminating formation of voids in an integrated circuit package. A nonpolymer support structure may be a material, such as copper foil, having sufficient rigidity to allow processing of chip scale package in strip format.
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