Instruction flow control for an instruction processor
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United States of America Patent
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Feb 2, 1999
Grant Date -
N/A
app pub date -
Jul 25, 1996
filing date -
Jul 25, 1996
priority date (Note) -
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Abstract
Method and apparatus for changing the sequential execution of instructions in a pipelined instruction processor by using a microcode controlled redirect controller. The execution of a redirect instruction by the pipelined instruction processor provides a number of microcode bits including a target address to the redirect controller, a predetermined combination of the microcode bits then causes the redirect controller to redirect the execution sequence of the instructions from the next sequential instruction to a target instruction.
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