Advanced massively parallel computer with a secondary storage device coupled through a secondary storage interface
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United States of America Patent
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Feb 2, 1999
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N/A
app pub date -
Aug 5, 1996
filing date -
Aug 5, 1992
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Abstract
An advanced massively parallel computer having a plurality of processor subsystems, where each processor subsystem is coupled to a secondary storage device (e.g., disk drive) through a secondary storage interface. The computer contains an input data bus for supplying data to the processor subsystem, an interprocessor communications bus for communicating data and instructions between processor subsystems, and an instruction bus for supplying instructions to the processor subsystems to facilitate data manipulation by each of the processor subsystems.
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