System and method for implementing an overlay pathway

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United States of America Patent

PATENT NO 5877741
SERIAL NO

08632543

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Abstract

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A system and method for processing overlay display data. A display FIFO pipeline processes background graphics display data and a separate overlay FIFO pipeline processes overlay display data stored in an off-screen part of a graphics memory. The overlay FIFO pipeline performs format conversion, interpolation and scaling on the overlay display data and outputs it to an overlay mux. The overlay mux selects between the outputs of the display FIFO pipeline and the overlay FIFO pipeline in the processing of each scan line.

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Patent Owner(s)

Patent OwnerAddress
SEIKO EPSON CORPORATIONTOKYO 160-8801

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chee, Lawrence P Vancouver, CA 1 132
Mulvenna, John David Delta, CA 1 132

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