Method for fabricating thin-film transistor

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United States of America Patent

PATENT NO 5879973
SERIAL NO

08510563

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Abstract

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To form a contact layer on source and drain electrodes of a stagger-type TFT, a conductive material is selectively sticked to the surface of the source and drain electrodes and a contact layer is selectively deposited by using the conductive material as growth species to form an active semiconductor layer on the contact layer. For an inverted-stagger-type TFT, a conductive material is selectively deposited on the surface of a contact layer to use the selectively deposited conductive material as source and drain electrodes so that patterning is unnecessary. To selectively deposit a contact layer of a TFT by alternately repeating etching and deposition, the temperature for the etching is set to 200.degree. C. or lower. A contaminated layer on the surface of a semiconductor film serving as an active semiconductor layer and contact layer of a TFT is removed by plasma at the temperature of 200.degree. C. or lower. For a stagger-type thin-film transistor, the hydrogen or halogen content of an insulating film serving as the substrate of source and drain electrodes is increased. For an inverted-stagger thin-film transistor, the hydrogen or halogen content of an insulating film serving as a channel protective film is increased. Thus, the etching rate of the surfaces of these insulating films by plasma increases.

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Patent Owner(s)

Patent OwnerAddress
SHARP KABUSHIKI KAISHA1 TAKUMI-CHO SAKAI-KU SAKAI CITY OSAKA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hirano, Takuya Kawasaki, JP 21 229
Ohgata, Koji Kawasaki, JP 10 166
Oki, Ken-ichi Kawasaki, JP 9 266
Takizawa, Yutaka Kawasaki, JP 13 201
Tanaka, Tsutomu Kawasaki, JP 399 11273
Yanai, Ken-ichi Kawasaki, JP 14 260

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