Method for forming a hole in a semiconductor device
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United States of America Patent
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Mar 16, 1999
Grant Date -
N/A
app pub date -
Feb 4, 1997
filing date -
Feb 4, 1997
priority date (Note) -
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Abstract
Processes for forming pedestal holes in a substrate assembly are described. In particular, processes using a high density plasma to etch doped or undoped silicon oxide are described. For example, a fluorocarbon chemistry is employed for selective deposition of a spacer layer to form a vertical to less than vertical spacer within a contact hole. The contact hole is extended using the spacer and a subsequent etch to complete formation of a via. Alternatively, both spacer deposition and contact hole formation may be achieved in a single etch step.
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