Smart-cut process for the production of thin semiconductor material films

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United States of America Patent

PATENT NO 5882987
SERIAL NO

08920117

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Abstract

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A process applicable to the production of monocrystalline films improves on the Smart-Cut.RTM. process by using an etch stop layer in conjunction with the Smart-Cut.RTM. process. Because of the etch stop layer, no chemical-mechanical polishing (CMP) is required after fabrication. Thus, the thickness and smoothness of the device layer in the fabricated silicon on insulator (SOI) substrate is determined by the uniformity and smoothness of the deposited layers and wet etch selectivity, as opposed to the CMP parameters. Therefore, the smoothness and uniformity of the device layer are improved.

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Patent Owner(s)

Patent OwnerAddress
S O I TEC SILICON ON INSULATOR TECHNOLOGIESFRENCH BERNINI BERNIN ISERE

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Srikrishnan, Kris V Wappingers Falls, NY 21 1837

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