High speed digital data retiming apparatus

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United States of America Patent

PATENT NO 5887040
SERIAL NO

08746992

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Abstract

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The present invention provides a high speed digital data retiming apparatus, in which, in binary data bits transmitted at a high speed, the data can be retimed in a stable manner, even if there are present a static skew due to a delay difference between the retiming clock pulse and the data and a dynamic skew due to the characteristic variation according to time and temperature. Therefore, the present invention has the following advantages compared with the conventional apparatus. First, periodical and regular external clock pulses are delayed by means of a delaying section, so that system performance is independent of the pattern of data. Second, even if the data phases show a continuous difference (wandering) for more than a certain period of time, an elastic buffer absorbs the wandering, and therefore, no data loss is generated, with the result that the system is not put to a disorder condition. Third, even in the case where a metastable state occurs, its occurrence probability can be significantly reduced by utilizing logic, thereby making it possible to retime the data in stable manner.

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Patent Owner(s)

  • ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE;KOREA TELECOMMUNICATION AUTHORITY

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Jung, Hee-Young Daejeon, KR 10 137
Lee, Bhum-Cheol Daejeon, KR 28 317
Park, Kwon-Chul Daejeon, KR 4 54

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