Multiprocessor system providing enhanced efficiency of accessing page mode memory by master processor
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United States of America Patent
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Mar 23, 1999
Grant Date -
N/A
app pub date -
Aug 13, 1990
filing date -
Aug 14, 1989
priority date (Note) -
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Abstract
In a multiprocessor system in which a master processor and a plurality of slave processors access in common a page mode memory, each slave processor functions such that upon completion of a memory access by the slave processor, the page address which was being accessed prior to that access by the slave processor is reloaded into the page buffer of the memory. Since in general each access by a slave processor is preceded by and followed by an access by the master processor, generally to the same page of the memory, this reduces the number of long accesses that must be executed by the master processor as a result of intervening accesses by slave processors.
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