Split-Control gate electrically erasable programmable read only memory (EEPROM) cell
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United States of America Patent
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Mar 30, 1999
Grant Date -
N/A
app pub date -
Apr 7, 1997
filing date -
Apr 7, 1997
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An EEPROM cell (32) is formed having a vertical select gate (34) and a horizontal select gate (40). The vertical select gate (34) and the horizontal select gate (40) enable two dimensional decoding which selects which one or which plurality of memory cells (32) are enabled for program, erase and read operations. An additional select gate having a control electrode (44) can be added to the cell (32) to provide additional decoding as is necessary. This split gate EEPROM cell (32) can be readily integrated onto an integrated circuit which also contains flash memory (204). The flash memory (204) and the split control gate EEPROM array (202) can share the same common charge pumps circuit (208).
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