Dram with integral sram comprising a plurality of sets of address latches each associated with one of a plurality of sram
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Mar 30, 1999
Issued Date -
N/A
app pub date -
May 14, 1997
filing date -
Mar 13, 1997
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A memory 601 comprising a plurality of static random access cell arrays 701, and a plurality of sets of latches 703 each for storing address bits associated with data stored in a corresponding one of the static random access cell arrays 701. Bit comparison circuitry 503 compares a received address bit with an address bit stored in each of the plurality of sets of latches 703 and enables access to a selected one of the static random cell arrays 701 corresponding to the set of latches 703 storing an address bit matching the received bit.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully