Method and apparatus for performing page mode accesses
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United States of America Patent
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Mar 30, 1999
Grant Date -
N/A
app pub date -
Mar 28, 1996
filing date -
Mar 28, 1996
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
An external bus master (205) accesses a DRAM (207) using a memory controller (804) internal to a data processor (3) without the use of external multiplexers or any other external circuitry. The need for external multiplexers and even a dedicated integrated circuit pin for providing external control during external master initiated DRAM accesses is removed by the implementation of a circuit and technique for multiplexing row and column addresses of the DRAM internally within the data processor.
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