Importance

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Abstract

A perspective texture mapping circuit (10) is disclosed. In a perspective texture mapping mode, an inverse z gradient and corresponding inverse z polygon vertex value is loaded into a first interpolator circuit (14), and texture address product gradients with corresponding polygon vertex texture address product values are loaded into a second and third interpolator circuit (16 and 18). The first interpolator circuit (14) interpolates a sequence of inverse z values for the surface of the polygon. The second and third interpolator circuits (16 and 18) interpolate corresponding texture address product values for each interpolated inverse z value. The texture address product values are divided by the corresponding inverse z value in a divider circuit (12) to generate texture address values. Texture address values are coupled to texture memory (20) to generate texel values which are passed onto an output FIFO (26). In a color interpolation mode, each pixel includes three color component. Different color component gradients and vertex color component values are coupled to each interpolator circuit (14, 16 and 18) which interpolate corresponding color component values for the surface of the polygon. Corresponding color component values are coupled together to the output FIFO (26) to generate color pixels.

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First Claim