Method of wafer level burn-in
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United States of America Patent
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Apr 20, 1999
Grant Date -
N/A
app pub date -
Nov 8, 1996
filing date -
Nov 8, 1996
priority date (Note) -
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Abstract
The present invention relates to a system and method for performing reliability screening on semi-conductor wafers and particularly to a highly planar burn in apparatus and method for uses including wafer level burn-in (WLBI), diced die burn-in (DDBI), and packaged die burn-in (PDBI). The burn-in system includes a burn-in substrate with a planar base, a temporary Z-axis connecting member, and a Z-axis wafer level contact sheet electrically coupled to one another for screening wafers, diced die, and packaged electronic components, their assembly and use.
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