Manufacturing method for self-aligned local interconnects and contacts simultaneously
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United States of America Patent
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May 4, 1999
Grant Date -
N/A
app pub date -
Mar 5, 1998
filing date -
Dec 22, 1997
priority date (Note) -
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Abstract
The invention provides a novel method, in which self-aligned, borderless contacts and local interconnections of semiconductor devices are manufactured in an integral process. The method is compatible with the LOGIC self-aligned titanium silicide (SALICIDE) and N+/P+ poly dual gate process modules. That is, this invention provides a self-aligned local-interconnect and contact (SALIC) method for a logic technology to forming the self-aligned, borderless contacts, and local interconnects (LI) simultaneously.
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