ATM cell buffer managing system in ATM node equipment

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United States of America Patent

PATENT NO 5901139
SERIAL NO

08716973

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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In an ATM cell buffer managing system in an ATM node equipment, a buffer occupied amount of each individual logical channel of a buffer memory is measured by a buffer occupied amount counting portion, and a threshold value for each individual logical channel is dynamically derived on the basis of the measured buffer occupied amount for making judgement whether an input ATM cell can be received or not per each logical channel. By this, in the buffer memory, effective throughput of upper layer packet level can be improved.

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Patent Owner(s)

  • CIENA CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Shinohara, Masayuki Tokyo, JP 158 1938

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