Emulator apparatus and emulation method for efficiently analyzing program faults
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United States of America Patent
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May 11, 1999
Grant Date -
N/A
app pub date -
Aug 4, 1997
filing date -
Feb 27, 1997
priority date (Note) -
Expired
status (Latency Note)
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Abstract
An emulation apparatus is connected to a host computer and a target system for verifying the operation of a program written for the target system. A microcomputer in the emulation apparatus executes the program written for the target system. In an undo mode, the execution of a program is halted at the end of the execution of each instruction. At that time, information on relative bus cycles is stored in a relative-bus cycle area of a memory. The contents of data and control registers in a target system are acquired and stored in data-register and control-register areas.
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