Advanced modular cell placement system with coarse overflow remover
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United States of America Patent
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Jun 22, 1999
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app pub date -
Jun 28, 1996
filing date -
Jun 28, 1996
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Abstract
A computer implemented method for optimizing cell placement for integrated circuit design is provided herein. The method comprises the steps of segmenting an integrated circuit surface abstraction into a plurality of regions; assigning a plurality of cells to one of the regions; creating a list of said plurality of cells in order of decreasing cell height; reassigning said cells in order of the list such that the cells are assigned to said region until there is insufficient capacity to fit anymore of the cells into the region; and thereafter assigning the remaining cells outside of the region.
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