Lid wafer bond packaging and micromachining
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jun 22, 1999
Issued Date -
N/A
app pub date -
May 6, 1998
filing date -
Aug 29, 1996
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A wafer level hermetically packaged integrated circuit has a protective cover wafer bonded to a semiconductor device substrate wafer. The substrate wafer may contain a cavity. The cover wafer seals integrated circuits and other devices including but not limited to air bridge structures, resonant beams, surface acoustic wave (SAW) devices, trimmable resistors, and micromachines. Some devices, such as SAWs, are formed on the surface of cavities formed in the protective cover wafer. Die are separated to complete the process.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully