Importance

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Abstract

A graphics processor for rasterizing graphics data using display list programming to a host computer system memory. The processor dynamically rasterizes the display list generated by a host processor to either graphics memory local to the graphics processor or to the host system memory. The graphics processor of the present invention includes a prefetch unit having instruction prefetch logic for prefetching and decoding next opcode instructions in a display list of instructions from system memory. Prefetching a next instruction eliminates steup time necessary to fetch subsequent opcode instructions after a first opcode instruction has been fetched. The next opcode instruction in a sequential display list of instructions is prefetched with parameter data associated with the first fetched opcode instructions to save the graphics processor extra instruction fetch cycle time necessary to fetch subsequent opcode instructions. The graphics processor further includes a bus mastering unit which allows the graphics processor to master the host computer system bus during the transfer of display list instructions from host computer system memory and the subsequent processing of these instructions in an uninterrupted mode.

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First Claim