Cascadable content addressable memory and system
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United States of America Patent
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Jul 27, 1999
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app pub date -
Sep 23, 1996
filing date -
Sep 23, 1996
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Abstract
A system for a pipeline cascaded content addressable memory CAM system for sequentially processing input data includes an input register, a CAM core, cascade logic and an output register. As the memory association functions produce matches in the CAM core, the cascade logic in parallel composites data associated with each matching CAM core. Each cascade processes a separate data input simultaneously then passes on the cumulative results to the next stage.
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