Power-sum circuit for finite field GF(2.sup.m)
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United States of America Patent
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Aug 3, 1999
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N/A
app pub date -
Nov 7, 1997
filing date -
Nov 7, 1997
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Abstract
A cellular-array power-sum circuit designed to perform AB.sup.2 +C computations in the finite field GF(2.sup.m) is presented, where A, B, and C are arbitrary elements of GF(2.sup.m). This new circuit is made up of m.sup.2 identical cells each consisting of an AND logic unit and an exclusive-OR logic unit. The AND logic unit may be configured to comprise three 2-input AND gates, and the exclusive-OR logic unit may be configured to comprise one 4-input XOR gate. The presented cellular-array power-sum circuit has a computation time of 2m gate delays. It is this power-sum circuit that provides basis for using circuits of pipeline architectures to compute exponentiations, inversions, and divisions in GF(2.sup.m).
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