Fault simulation apparatus

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United States of America Patent

PATENT NO 5931963
SERIAL NO

08844641

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A fault simulation apparatus includes an MOS transistor output signal strength determining portion for extracting the conductivity type of an MOS transistor in which an event such as a variation in signal level occurs. A control signal value is obtained from a control terminal, and an input signal value is obtained from an input terminal, and output signal strength when the event occurring MOS transistor is turned ON is determined. In the apparatus, fault simulation is performed depending upon the output signal strength determined by the output signal strength determining portion.

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Patent Owner(s)

Patent OwnerAddress
RENESAS ELECTRONICS CORPORATIONKAWASAKI-SHI

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Tani, Takahiro Hyogo, JP 15 151

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