Method and apparatus for determining a set of tests for integrated circuit testing
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United States of America Patent
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Aug 10, 1999
Grant Date -
N/A
app pub date -
Jun 10, 1997
filing date -
Jun 10, 1997
priority date (Note) -
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Abstract
The present invention is directed to a system comprised of a computer, at least one integrated circuit tester, a communications link enabling communications between the integrated circuit tester and the computer, and a computer-readable medium. The computer-readable medium contains a sequence of instructions that, when executed, create a set of tests for integrated circuit testing. The set of tests may include only those tests that are calculated to be statistically significant. A second set of tests may be created that includes only those tests that are calculated to be statistically insignificant. The computer monitors the test results and moves tests between the two sets to ensure that only statistically significant tests are in the first group and that only statistically insignificant tests are in the second group.
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