Method and apparatus for emulating multi-ported memory circuits

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5940603
SERIAL NO

08953315

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A memory design is implemented in static memory circuits having a plurality of bidirectional access ports, wherein each port is configured for read or write access. The memory design defines initial contents, depth, width, and bank selection in the memory circuits according to predefined configuration values, as well as, for each access port, whether that access port is configured for read or write. Port access occurs during time slots, which are based on external clock signals and memory circuit access times. Modified memory designs may be implemented such that access ports are accordingly reconfigured.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
CADENCE DESIGN SYSTEMS INC2655 SEELY AVENUE SAN JOSE CA 95134

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Huang, Thomas B San Jose, CA 15 724

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation