Host initiated PCI burst writes utilizing posted write buffers
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United States of America Patent
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Aug 24, 1999
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N/A
app pub date -
Feb 11, 1998
filing date -
Nov 16, 1993
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Abstract
A bridge logic takes write cycles that appear one at a time as an address followed by an associated data word on a host bus, detects consecutive addresses, and uses this information to create burst cycles on a peripheral control interface (PCI) bus that has protocols that allow burst cycles.
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