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Abstract

Apparatus and method are provided for enabling unimpeded, clock-to-clock communication between different classes of equipment including converting without queuing of data parallel bytes of digital data having a given number of binary bits to parallel bytes having a different (greater or smaller) number of bits. Converting of bytes is accomplished by momentarily storing as current data and as remainder data respective bits of successive incoming bytes clock count by clock count; identifying within each count a desired number of bits stored as remainder data, or current data, or both and grouping them into a set of bits to be outputted as an outgoing byte during a respective count; outputting such sets of bits clock count by clock count as outgoing bytes such that the outgoing bytes each have a different number of bits versus the number of bits in each incoming byte, and the outgoing bits have a desired numerical sequence; and periodically compensating for the total number of bits outputted versus the number inputted during a given period of time. After each conversion of the bytes in a data stream the converted bytes are momentarily stored in a buffer memory (phasor) which provides for timing flexibility as the bytes of data are transferred to other locations.

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First Claim