Positioning/wiring method for flip-chip semiconductor device

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United States of America Patent

PATENT NO 5946477
SERIAL NO

08705856

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Abstract

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In an automatic positioning/wiring method for a flip-chip semiconductor device which is adapted to design a semiconductor chip including test pads used for inputting/outputting signals in a test, chip terminals respectively arranged on or near the test pads to serve as input/output terminals for an external unit, input/output buffers for exchanging signals with the external unit, and internal circuit blocks which perform predetermined circuit operations in response to signals from the input/output buffers, the internal circuit blocks and the input/output buffers are position/wired in arbitrary regions on the semiconductor chip in an automatic positioning/wiring design process on the basis of a result of a layout position determination process for performing definition such that the input/output buffers and the internal circuit blocks are arranged without discrimination layout regions thereof. A floor plan formation process is performed to arrange the input/output buffers into predetermined groups within the arbitrary region in the form of rows each parallel to one of sides of the semiconductor chip.

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Patent Owner(s)

Patent OwnerAddress
RENESAS ELECTRONICS CORPORATIONTOKYO 135-0061

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ito, Soichi Tokyo, JP 8 119

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