Four-region (PNPN) semiconductor device
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United States of America Patent
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Sep 21, 1999
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app pub date -
Aug 30, 1995
filing date -
Aug 30, 1994
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Abstract
A four-region (PNPN) semiconductor device structure that provides greater flexibility in the setting of PN junction breakdown conditions. The four-region (PNPN) semiconductor device includes an additional N-type body at the junction between the inner N-type region and the inner P-type region, the additional N-type body including a first part adjacent to a second part, the first and second parts having different impurity concentrations from one another, both being of high impurity concentration than the inner N-type region and of lower impurity concentration than the inner P-type region.
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