Integrated circuit ferroelectric memory devices include an integrated circuit substrate which includes a cell region and a periphery region. A plurality of ferroelectric memory cells are formed in the cell region, including a plurality of ferroelectric capacitors. The ferroelectric capacitors each include a lower electrode, a ferroelectric layer on the lower electrode, and an upper electrode on the ferroelectric layer opposite the lower electrode. A first material layer is included on the upper electrodes in the cell region, opposite the ferroelectric layer and on the integrated circuit substrate in the peripheral region. The first material layer, which may be a semiconductor layer or an insulator layer, forms a plurality of resistors in the periphery region. Thus, a semiconductor layer or an insulator layer can be used as a resistor in the periphery region of the memory device without deteriorating the capacitor characteristics. Adhesion of the upper electrode to interconnection layers which are subsequently formed and to dielectric films which are subsequently formed can also be enhanced by the first material layer.
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