Semiconductor integrated circuit with appropriate data output timing and reduced power consumption
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United States of America Patent
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Sep 21, 1999
Grant Date -
N/A
app pub date -
Sep 17, 1997
filing date -
Mar 21, 1997
priority date (Note) -
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Abstract
A semiconductor integrated circuit includes a first clock-input circuit receiving an external clock from an external source and outputting an internal clock, an output-control-clock generating circuit receiving the internal clock to generate an output-control clock, and a first data-output circuit outputting output data in synchronism with one of a rise timing and a fall timing of the output-control clock. The output-control-clock generating circuit controls a timing of the output-control clock such that the first data-output circuit outputs the output data a predetermined fraction of one clock cycle of the external clock after a clock pulse of the external clock.
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