Interface for connecting a bus to a random access memory using a swing buffer and a buffer manager
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United States of America Patent
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Sep 21, 1999
Issued Date -
N/A
app pub date -
Oct 15, 1997
filing date -
Mar 24, 1994
priority date (Note) -
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Abstract
A configurable RAM interface connecting a bus to RAM is adapted to receiving large multiword variable length tokens at a high data arrival rate, using a swing buffer and a buffer manager. An address source provides complete addresses to the interface. The buffer manager has a state machine which transitions among a plurality of states, maintaining status information about the buffers, allocating the buffers for reference by a write address generator, clearing the buffers for occupation by subsequently arriving data, and maintaining status information concerning the buffers. The buffer manager also examines tokens of received data in order to update the status of the arrival buffer.
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