Importance

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Abstract

A test structure and test methodology are taught herein wherein a test structure (10) is used to test an entire integrated circuit product wafer (44). The test structure (10) has a backing support wafer (39). A die attach compound (38) is used to attach a plurality of segmented individual test integrated circuits 28-34 to the backing support wafer (39). The plurality of test integrated circuits 28-34 have a top conductive bump layer (26). This conductive bump layer (26) is contacted to a thin film signal distribution layer (14) which contains conductive interconnects, conductive layers, and dielectric layers which route electrical signals as illustrated in FIG. 2. The layer 14 also conductively connects to bumps (46) on a product wafer (44). In addition, leads (40) are coupled to conductive elements of the layer (14). An external tester is coupled via leads (40) to the integrated circuits (28) and (34) whereby the integrated circuits (28-34) burn-in or test integrated circuits on the product wafer (44) in an efficient and effective manner.

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First Claim