Method of making a merged device with aligned trench FET and buried emitter patterns
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United States of America Patent
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Sep 28, 1999
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N/A
app pub date -
Jun 4, 1997
filing date -
Feb 28, 1995
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Abstract
A merged power device structure, of the emitter-switching type, in which the emitter of the bipolar power transistor has a minimum-width pattern which is aligned to the trenches of a trench control transistor. Thus the current density of the bipolar is maximized, since the emitter edge length per unit area is increased. The parasitic base resistance of the bipolar can also be reduced.
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