Method for programming complex PLD having more than one function block type
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United States of America Patent
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Oct 5, 1999
Issued Date -
N/A
app pub date -
Mar 12, 1997
filing date -
Dec 23, 1994
priority date (Note) -
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Abstract
A method for programming programmable logic devices (PLDs) having multiple function block types to implement a logic function, whereby the logic function is mapped into one of the function block types before being mapped into the remaining function block types. In one embodiment, a PLD containing both 'fast' function blocks (FFBs) and 'high density' function blocks (HDFBs) are programmed such that the FFBs are programmed prior to the HDFBs. This method maximizes the overall speed of an implemented logic function.
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