Large scale integrated circuit having functional blocks controlled with clock signals that conduct setting operations at different times
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United States of America Patent
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Oct 5, 1999
Grant Date -
N/A
app pub date -
Aug 19, 1997
filing date -
Aug 19, 1996
priority date (Note) -
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Importance
Abstract
An LSIC includes a clock distributor circuit capable of decreasing the power consumption and suppressing the deviation of the power source potential and the transient current. The circuit includes a plurality of functional blocks including CPU. The CPU conducts a data accessing operation via address and data buses to peripheral blocks. There is also provided a clock supply unit to supply clock signals in which at least one of the clock signals has a phase different from those of the remaining clock signals and the clock signals do not accomplish the setting operation at the same time.
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