Advanced modular cell placement system with functional sieve optimization technique

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United States of America Patent

PATENT NO 5963455
SERIAL NO

08672936

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Abstract

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A system for optimizing placement of a cell on a surface of a semiconductor chip is disclosed herein. The cells may belong to nets and may belong to neighborhoods. The system initially calculates affinities based on repositioning the cell. The system then combines affinities and repositions cells based on these combined affinities. The system then computes a cost function and repeats the combining, repositioning, and computing functions a predetermined number of times.

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Patent Owner(s)

Patent OwnerAddress
BELL SEMICONDUCTOR LLC401 N MICHIGAN AVE SUITE 1600 CHICAGO IL 60611

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Andreev, Alexander E Moskovskaga Oblast, RU 147 4411
Koford, James S San Jose, CA 78 4551
Scepanovic, Ranko San Jose, CA 165 5904

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