Buffer management and system coordination method

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5963977
SERIAL NO

08947213

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ATTORNEY / AGENT: (SPONSORED)

Importance

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Abstract

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A method of coordinating access to a data buffer including a plurality of data blocks, using a buffer list with a plurality of entries corresponding to the data blocks. Each buffer list entry includes: (i) a status code for indicating the status of data in the corresponding data block, and (ii) a partial address common to both the next buffer list entry and a data block corresponding to said next buffer list entry. A status code is selected from a cyclical set of sequential status codes having a period of N, the status codes sequentially, and alternately, representing the most recent history of a data block, including: (i) full status, indicating data in the data block has been retrieved from the storage device or is to be stored to the storage device, or (ii) empty status, indicating data transferred out of the data block to a host or to the storage device. A store flag maintains a status code representing empty status, and a retrieve flag maintains a status code representing full status. When storing data into the data buffer, locating a desired buffer list entry list with an empty status code by traversing the buffer list, calculating the address of each entry using the partial address in the previous entry, until the desired entry is found. The address of the data block corresponding to the found entry is calculated and data is stored in the data block when the status code of the entry matches the store flag status code. The found entry status code is advanced once, and if the entry is last in the buffer list the store flag status code is advanced twice. Similarly, when retrieving data from the data buffer, locating a desired entry in the buffer list with a full status code by traversing the buffer list, calculating the address of each entry using the partial address in the previous entry, until the desired entry is found. The address of the data block corresponding to the found entry is calculated and data is retrieved from the data block when the status code of the entry matches the retrieve flag status code. The found entry status code is advanced once, and if the entry is last in the buffer list the retrieve flag status code is advanced twice.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
MAXTOR CORPORATIONMILPITAS, CA685

International Classification(s)

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  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bui, Trinh San Jose, CA 5 217
Gold, Clifford M Fremont, CA 9 449
Li, George Santa Clara, CA 9 37
Luong, Hoa Fremont, CA 2 10
Mee, Bryan San Jose, CA 1 7
Nguyen, Hang D Fremont, CA 1 7
Paul, Steve Santa Cruz, CA 4 13
Uppuluri, Minnie San Jose, CA 1 7

Cited Art Landscape

Patent Info (Count) # Cites Year
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (1)
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HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (2)
* 5812775 Method and apparatus for internetworking buffer management 104 1995
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INTEL CORPORATION (1)
* 5619673 Virtual access cache protection bits handling method and apparatus 11 1996
 
VLSI TECHNOLOGY, INC. (1)
* 5860119 Data-packet fifo buffer system with end-of-packet flags 85 1996
 
SILICON GRAPHICS INTERNATIONAL CORP. (1)
* 5835925 Using external registers to extend memory reference capabilities of a microprocessor 41 1996
 
GLOBALFOUNDRIES INC. (1)
* 5764938 Resynchronization of a superscalar processor 22 1997
 
SUN MICROSYSTEMS, INC. (1)
* 5675765 Cache memory system with independently accessible subdivided cache tag arrays 17 1996
* Cited By Examiner

Patent Citation Ranking

Forward Cite Landscape

Patent Info (Count) # Cites Year
 
MAXTOR CORPORATION (1)
6763437 Control system, storage device and method for controlling access to a shared memory using a bus control or handshaking protocol 11 2000
 
E. I. DU PONT DE NEMOURS AND COMPANY (1)
* 2004/0051,873 Aspecular multi-angle protractor for evaluating a surface containing metallic particles 0 2002
 
CISCO TECHNOLOGY, INC. (1)
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INTEL CORPORATION (1)
* 6625708 Method and apparatus for dynamically defining line buffer configurations 1 1999
 
VERITAS TECHNOLOGIES LLC (1)
* 9177177 Systems and methods for securing storage space 2 2012
 
GLOBALFOUNDRIES INC. (1)
* 6769055 Two-part memory address generator 6 1999
 
RENESAS ELECTRONICS CORPORATION (4)
* 6738890 Data processor 6 2002
* 2003/0028,749 Data processor 9 2002
6901501 Data processor 0 2004
* 2004/0193,778 Data processor 3 2004
* Cited By Examiner