NROM fabrication method with a periphery portion
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United States of America Patent
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Oct 12, 1999
Grant Date -
N/A
app pub date -
Jun 11, 1997
filing date -
Jun 11, 1997
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Abstract
A method of fabricating a nitride read only memory (NROM) chip creates an oxide-nitride-oxide (ONO) layer on a substrate and etches the ONO layer within the memory portion of the chip into columns. Bit lines are implanted between columns after which bit line oxides are generated on top of the bit lines with the thickness of the bit line oxides being independent of the thickness of the bottom oxide. The thickness of a gate oxide layer in a periphery portion of the chip is also relatively independent of the thicknesses of the other oxides. Finally, rows of polysilicon or polysilicide are formed perpendicular to and on top of the bit line oxides and the ONO columns.
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