Importance

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Abstract

A data signal output circuit is divided into a plurality of blocks, each having its own supply circuit. In each block, a plurality of shift register sections, constituting a shift register, output pulse signals which have been shifted according to clock signals. Driving sections sample a digital image signal in synchronism with the pulse signal, and output data signals corresponding to the image signal thus sampled to a plurality of output lines. Each supply circuit provided in the blocks receives the image signal when the image signal should be sampled by the driving sections, thereby supplying the image signal only to the minimum number of blocks to be operated. In this manner, the image signal is selectively supplied to the block so as to reduce the effective load on the image signal. As a result, the power consumption generated in the image signal lines can be reduced.

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First Claim