Synchronous read channel integrated circuit employing a channel quality circuit for calibration
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United States of America Patent
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Nov 2, 1999
Issued Date -
N/A
app pub date -
Mar 19, 1997
filing date -
Feb 1, 1993
priority date (Note) -
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Abstract
A synchronous read channel is disclosed which samples an analog read signal from a magnetic read head positioned over a magnetic disk medium, filters the sample values according to a desired partial response, extracts timing information from the filtered sample values, and detects an estimated data sequence from the filtered sample values using a discrete time sequence detector. A Channel Quality circuit accumulates various signals generated by the read channel, such as sample errors, gain errors, timing errors, etc., for use in calibrating the read channel components and estimating the bit error rate.
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