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Abstract

Multiprocessor architecture having advantages of both synchronous and asynchronous architectures. The multiprocessor (FIG. 10) comprises processors (300) operating in parallel and synchronously. Each processor operates at a different rate (a), so that each processor processes a data unit (316) in a different amount of time. An input distribution function (317) receives an input stream of data and distributes it to individual processors for processing, in amounts directly proportional to the operating rates of the individual processors, so that each processor processes all of the data distributed to it in the same amount of time as the other processors. Input data buffers (301) connected to processors operate synchronously with the connected processors, receiving and storing the distributed data and inputting it to the connected processors at rates synchronized with the processors' operating rates. Output data buffers (301) operating synchronously with the processors receive and store the processed data, and output it through an output gating function (318) into an output data stream at times and at rates also synchronized with the processors' operating rates.

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First Claim