Matrix type multiple numeration system ferroelectric random access memory using leakage current
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United States of America Patent
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Nov 16, 1999
Grant Date -
N/A
app pub date -
Oct 31, 1997
filing date -
Oct 31, 1996
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The present invention relates to a matrix type multiple numeration system ferroelectric random access memory using a leakage current of dielectric, which is non-volatile and with which a multiple numeration system is realized, and a method for manufacturing the same. In the memory according to the present invention, the unit cells formed of the dielectric and ferroelectric capacitors are arranged in a matrix, the lower electrodes are connected to bit lines, and the upper electrodes are connected to word lines. Thus, a transistor for selecting cells is included for each word line and each bit line. Therefore, it is possible to heighten the integration degree, since the memory cells are each formed of only a dielectric and a ferroelectric capacitor, and to improve productivity since manufacturing processes are simple.
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