Chip attenuator having a capacitor therein
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United States of America Patent
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-
Nov 16, 1999
Grant Date -
N/A
app pub date -
Dec 29, 1997
filing date -
Dec 29, 1997
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An attenuator includes a flat, substantially rectangular substrate of an insulating material having a surface. A plurality of termination areas of a conductive material are on the substrate surface and are spaced from each other. Three resistors are on the substrate surface and are connected in a series parallel combination between the termination areas. The resistors may be formed by three separate resistance layers extending between and connected to the termination areas, or a single resistance layer extending between and connected to the termination areas. A shunt capacitor is on the substrate surface and is connected to one of the resistors. The shunt capacitor is formed by an area of a conductive material on the substrate surface and overlapping a portion of the resistors, and a dielectric layer between the conductive area and the resistor.
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