Apparatus and method for scheduling virtual circuit data for DMA from a host memory to a transmit buffer memory
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United States of America Patent
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Nov 30, 1999
Issued Date -
N/A
app pub date -
Sep 12, 1996
filing date -
Sep 12, 1996
priority date (Note) -
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Abstract
A method of scheduling the transmission of cells from a network node involves storing entries in a schedule table at predetermined locations, wherein each location represents a point in time at which a cell is to be transmitted. Each entry in the table contains a pointer to a list of virtual circuits having cells scheduled for transmission at the time corresponding to the location of the entry in the table. When a VC has a cell to be transmitted at a particular time, the VC is queued to the head, rather than the tail, of the list of VCs pointed to by the pointer located at the entry in the table corresponding to the time at which the cell is to be transmitted. The VC is therefore the first VC transmitted from the list of VCs.
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