Method for manufacturing DRAM capacitor
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United States of America Patent
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Dec 7, 1999
Grant Date -
N/A
app pub date -
Apr 6, 1998
filing date -
Jan 14, 1998
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A method for forming a DRAM capacitor that uses a sacrificial layer to form a gear-teeth mold for producing a storage electrode having a highly increased surface area. The mold in a sacrificial layer is formed by first depositing alternating layers of two different insulating materials on a dielectric layer, and then patterning the sacrificial layer to form an opening using a conventional method. Next, a wet etching operation is performed using an etchant having a high etching selectivity between the two insulating layers. Hence, sunken slots are formed in the insulating layers that have a higher etching rate than its adjacent insulating layers, thus obtaining a gear teeth cross-sectional profile. Finally, the mold in the sacrificial layer is used for forming the storage electrode.
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