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Abstract

A binary tree computer system connected to a host computer that includes N bus controllers connected in a binary tree configuration in which each bus controller except those at the extremes of the tree are connected to left and right child bus controllers, where N is an integer. One of the bus controllers is a root bus controller that connects the binary tree to the host computer. Each of the bus controllers has an associated processing element attached thereto and two processing elements are connected to each of the bus controllers at the extremes of the binary tree. Each of the processing elements includes a microprocessor and an associated memory. Each of the bus controllers includes, for each of the processing elements connected thereto, a buffered interface connecting the processing element to the bus controller for transmitting instructions and data between the bus controller and the processing element, and for writing and reading information into and from the memory of the processing element without involving the microprocessor.

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First Claim