Methods for manufacturing a semiconductor package having a sacrificial layer

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6001671
SERIAL NO

08634464

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A method of manufacturing a semiconductor chip package. A sacrificial layer is used as a base to selectively form an array of conductive pads such that a central region is defined by the pads. A back surface of a semiconductor chip is next attached to the sacrificial layer within the central region between the pads so that the contact bearing surface of the chip faces away from the sacrificial layer. The chip contacts are then electrically connected to respective pads, typically by wire bonding a wire therebetween. A curable, dielectric liquid encapsulant is then deposited on the sacrificial layer such that the pads, electrical connections and chip are fully encapsulated, as by an overmolding operation. The encapsulant is then cured and the sacrificial layer is either completely removed or is selectively removed to expose a surface of the pads for electrical attachment to a PWB and the back surface of the chip for creating a direct thermal path from the chip to the PWB.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
TESSERA INC3025 ORCHARD PARKWAY SAN JOSE CA 95134

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fjelstad, Joseph Sunnyvale, CA 130 7144

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation