Vertical connector based packaging solution for integrated circuits

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United States of America Patent

PATENT NO 6005776
SERIAL NO

09002775

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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An assembly featuring a substrate and a plurality of components. The plurality of components are packaged to be connected in a vertical orientation to the substrate. These components include (i) a vertical chip-scale package (CSP), (ii) an integrated circuit die and (iii) an interconnect. Including a plurality of connection leads, the vertical CSP contains the die which is generally situated along a vertical plane. The interconnect, capable of transferring information between the plurality of connection leads and the integrated circuit die, includes a first segment generally perpendicular to the vertical plane and connected to at least one connection lead. The interconnect further includes a second segment generally in parallel to the vertical plane and connected to the integrated circuit die.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BLVD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Holman, Thomas J Portland, OR 166 10469
Leddige, Michael W Beaverton, OR 38 1243

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